Editor Right Click Menu

Navigate

Editor Right Click Menu (1)

Open Declaration Jump to declaration of the entity under cursor. Similar with clicking on hyperlink.
Quick Outline Open the Quick Outline View.
Quick Load Order Open the Quick Load Order View.
Quick Layers Open the Quick Layers View.
Quick Macros Open the Quick Macros View.
Quick Types Open the Quick Types View.
Quick Hierarchy Open the Quick Hierarchy View.
Show Layers Raise and update the Layers View with extensions of the entity under cursor.
Show Hierarchy Raise and update the Hierarchy View for the entity under cursor.
Show Instance Tree Raise and update the Instance Tree View for the entity under cursor.

Edit

Editor Right Click Menu (2)

Jump to Pair Bracket Jump to pair bracket.
Folding User Region Define Create a folding marker for the selected region.
Folding Collapse All Levels Fold to statement level.
Folding Expand All Levels Unfold code.
Folding Show First Level Fold to struct member level.
Folding Toggle Current Line Fold/unfold.
Format Source Formats the selected code or the entire file if no selection.
Switch to Verilog/VHDL Comment Style Use Verilog or VHDL comment style on toggle comment.
Toggle Comment Comment/uncomment selection or current line.

Project

Editor Right Click Menu (3)

Rebuild Clean and rebuild project.
Set Active Test Set the selected file as active test.
Add to Test Files Add the selected file or directory to test files list.
Add to Top Files Add the selected file to top files list.
Ignore File Ignore the selected file (errors no longer reported).

Run

Editor Right Click Menu (4)

Load in Specman Load the selected file in Specman. Output is sent to Console.