Specador Documentation Generator User Guide
Rev. 24.1.8, 24 April 2024
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Overview
How to Run
Compile Arguments
Auto-config
Emulating compiler invocations
Compatibility Modes
Default DVT Compatibility Mode
gcc Compatibility Mode
ius.irun Compatibility Mode
ius.perspec Compatibility Mode
questa.vcom Compatibility Mode
questa.vlog Compatibility Mode
questa.qrun Compatibility Mode
vcs.vhdlan Compatibility Mode
vcs.vlogan Compatibility Mode
xcelium.xrun Compatibility Mode
Paths
Strings
Comments
Environment Variables
Including Other Argument Files
All Build Directives
e Language Test Files
e Language SPECMAN_PATH
SystemVerilog OVM or UVM Library Compilation
Xilinx Libraries Compilation
Intel(Altera) Quartus Libraries Compilation
Compile Waivers
Customizations
Preferences File
Menu File
>
Diagrams
UML Diagrams
Design Diagrams
WaveDrom Timing Diagrams
UVM Register Bit Field Diagrams
UVM Component Diagrams
External Diagram Generators
Comments Formatting
reStructuredText
Markdown
JavaDoc
NaturalDocs
Memory Monitor
Application Notes
Output and logging
What is New?
Legal Notices
Third Party Licenses
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Chapter 6. Diagrams
Table of Contents
6.1. UML Diagrams
6.2. Design Diagrams
6.3. WaveDrom Timing Diagrams
6.4. UVM Register Bit Field Diagrams
6.5. UVM Component Diagrams
6.6. External Diagram Generators