DVT SystemVerilog IDE User Guide
Rev. 22.1.18, 15 June 2022
To see all instances of a module, interface or program, hover on the name with the mouse cursor while holding down the Ctrl key and select Show Instances in Design Hierarchy.
You can also place the editor cursor on it's name then right click and select Show > Instances in Design Hierarchy View.
The results are presented in the Design Hierarchy View.
Tip: You can also trigger this functionality from a view's context menu, for example from the Types View.
Note: This functionality works in mixed-language designs, for example when you have a VHDL entity instantiated in a Verilog module or a Verilog module instantiated in a VHDL component.