DVT IDE for VS Code SystemVerilog User Guide
Rev. 23.1.3, 31 January 2023
The Verification Hierarchy View presents the UVM object instance tree. An UVM object instance is a class member of an UVM based type that is created using an UVM factory create call.
To open the Verification Hierarchy view use the DVT: Focus on Verification View command.
You can also position the editor cursor on the name of an UVM based class and use the command DVT: Show Verification Hierarchy. The Verification Hierarchy View opens with the chosen element set as the top of the hierarchy.
By using the DVT: Select Verification Hierarchy Top command, a quick pick will appear to select from top UVM components. A top component instantiates other UVM components or UVM objects and it is not itself instantiated.
You can scroll through the tree of instances using:
You can double-click on any component to go to its UVM factory create call.
Right-click on an instance in the hierarchy and you have the following options :
You can double-click on any port to go to its declaration.
By clicking on an instance it shows the ports of the selected element. Right-click on a port in the hierarchy and you can copy the hierarchy path of the selected port to clipboard ( Copy Hierarchy Path ).
You can use the filters to locate a specific instance or port. More details here.