Verissimo SystemVerilog Testbench Linter User Guide
Rev. 24.1.6, 27 March 2024

9.2 Lint Waivers File Example

<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<waivers version="7">

    <waiver name="waiver_1">
        <status>WARNING</status>
        <description>
          Demote all errors in SVTB rule 11.2.1
          (single character loop iterator)
          to warning severity
        </description>
        <checks>
            <check>SVTB.11.2.1</check>
        </checks>
    </waiver>

    <waiver name="waiver_2">
        <status>DISABLE</status>
        <description>
          Disable UVM rule 2.8.1 failing
          on test_lib.sv for tests
          test_read_modify_write and test_2m_4s
        </description>
        <check>UVM.2.8.1</check>
        <path>/full_path_to_xbus/xbus/examples/test_lib.sv</path>
        <line-ranges>
            <line-range>64:67</line-range>
            <line-range>108:111</line-range>
        </line-ranges>
    </waiver>

    <waiver name="waiver_3">
        <status>INFO</status>
        <description>
          Demote to INFO error hits
          for 'trans_collected'
          in rule UVM.6.2
        </description>
        <check>UVM.6.2</check>
        <message-pattern>.*trans_collected.*</message-pattern>
    </waiver>

    <pre-waiver name="pre-waiver_1" >
        <description>
          Do not lint 3rd party IP in certain folder - applies to all checks
        </description>
        <paths regex="simple">
            <path>/full_path_to_project/ips/*</path>
        </paths>
    </pre-waiver>

</waivers>