Verissimo SystemVerilog Testbench Linter User Guide
Rev. 23.2.28, 28 November 2023
| The +dvt_init+vcs.vhdlan directive resets the builder to the vcs.vhdlan default state. File Extension to Language Syntax Mapping
Language Syntax for Unmapped Extensions: VHDL 1076-1993 Mode Specific Directives
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