For design and verification engineers who are working with Verilog, SystemVerilog, Verilog AMS, VHDL, UPF, CPF, e Language, PSS, SLN, or SDL, the Design and Verification Tools (DVT) Eclipse IDE is an integrated development environment (IDE) that significantly improves productivity.
Unlike plain text editors providing regular expression based capabilities, the DVT Eclipse IDE compiles the code and signals errors as you type, speeds-up code writing using auto-complete and quick fix proposals, and allows you to find anything you are looking for instantly.
What the DVT Eclipse IDE can give you in seconds would likely have taken you several minutes or hours to find and do by hand.
It is similar to well-known programming tools like Visual Studio®, NetBeans®, and IntelliJ® that are commonly used in the software world.
The DVT Debugger is an add-on module to the DVT Eclipse IDE. It integrates with all major simulators and provides advanced debugging capabilities.
Verissimo SystemVerilog Testbench Linter is a coding guideline and verification methodology compliance checker that enables engineers to perform a thorough audit of their testbenches.
Specador is a tool that automatically generates accurate HTML documentation from the source code.